NJU7380 -1- stepper motor controller general description NJU7380 is a controller with transrator which convert from input step and direction pulse to driver's phase signal for full and half step. NJU7380 translates from pulse input signal (serial interface) to phase signal input, so njm3700 series dual channel bipolar drivers or njm2672 dual h-bridge driver can be easily controlled by a micro processor . NJU7380 is also including auto current down (acd) circuit which is suitable for reducing power dissipation of power devices and motor. package outline NJU7380e features ? operating voltage v dd =4.75 5.25v ? absolute maximum voltage 7v ? half -step and full - step operation ? internal phase logic ? phase logic reset terminal(reset) ? internal auto current down function ? specially matched to njm3775,njm3777 and njm2672. ? c-mos technology ? package outline emp14 pin configurations fig. 1 pin configurations 1. dir 8. mo 2. step 9. acd 3. hsm 10. dis2 4. reset 11. dis1 5. ct 12. pb 6. sgnd 13. pa 7. pgnd 14. v dd 1 4 3 2 5 7 6 8 9 10 11 12 13 14
NJU7380 - 2 - block diaglam fig.2 block diagram pin description pin pin name description 1 dir direction command input for determining motor turning direction 2 step motor steeping pulse input, phase logic operation triggered by negative edge of step signal 3 hsm half/full step mode switching input h level in full step mode and l level in half step mode 4 reset phase logic initial input 5 mo phase output initial status detection output 6 ct a value of connected capacitor determines lock detection time (ton) and auto resume time (toff) 7 sgnd 8 pgnd sgnd (logic gnd) and pgnd (analog gnd) is not connect in the ic sgnd and pgnd pins should be connected ground respectively. 9 acd auto current down output terminal l level in active 10 dis2 11 dis1 12 p2 13 p1 step sequence output terminals p1/dis1(p2/dis2) determine a sequence output on phase1(2) for driver ic p1(p2) determine a motor current direction on phase1(2) for driver ic dis1(dis2) determine a phase current off mode at the half-step 14 v dd logic power supply voltage terminal por phase logic & acd logic step di r res et hsm ct sgnd p g nd pa pb mo acd dis2 dis1 v dd
NJU7380 - 3 - absolute maximum ratings (ta=25 c) parameter ratings symbol [unit] note supply voltage +7.0 v dd [v] input voltage -0.3 v dd +0.3 v id [v] output current 10 i o [ma] operating temperature range -40 85 t opr [ c] storage temperature range -40 +125 t stg [ c] power dissipation 300 p d [mw] device itself recommended operating conditions v dd =4.75v 5.25v electrical characteristics (v + =5v, ta=25c) parameter sysmbol condition min. typ. max. unit operating current i dd - - 3.0 4.0 ma h level input voltage v ih - 3.5 - - v l level input voltage v il - - - 1.5 v h level input current i ih - - 100 150 a l level input current i il - - -100 -150 a phase output saturation voltage v p i p =5ma - - 0.5 v dis output saturation voltage v dis i dis =5ma - - 0.5 v vr detection voltage v vr i mo =5ma - - 0.5 v mo output saturation voltage v mo i mo =5ma - - 0.5 v output leak current i leak v dd =7v - - 1 a power down on time t on c t =0.1 f 140 200 260 ms turn on time t don - - - 3 s turn off time t doff - - - 3 s set-up time t s - 400 - - ns step-pulse continuation time v spc - 800 - - ns
NJU7380 - 4 - applacation information fig.3 typical stepper motor driver application with njm3775. functional description NJU7380 is a transrator, intended to convert from input step and direction pulse to driver's phase signal for 2- phase stepper motor driver. motor control is simply attained only by the pulse generator because you use it by njm3775 and the set. logic input NJU7380 contains all phase logic necessary to control the motor in a proper way. if any of the logic inputs are left open, the circuit will accept it as a high level. in order to make noise-proof nature into the maximum, it is necessary to connect an idle input terminal to v dd level. ? step ? stepping pulse the built-in phase logic sequencer goes up on every negative edge of the step signal (pulse). in full step mode, the pulse turns the stepping motor at the basic step angle. in half step mode, two pulses are required to turn the motor at the basic step angle. the dir (direction) signal and hsm (half/full mode) are latched to the step negative edge and must therefore be established before the start of the negative edge. note the setup time ts in figure 4. ? dir ? direction the dir signal determines the step direction. the direction of the stepping motor depends on how the NJU7380 and njm3775 are connected to the motor. although dir can be modified this should be avoided since a misstep of 1 pulse increment may occur if it is set simultaneous with the negative edge. see the timing chart in figure 4. phase1 dis1 vr1 phase2 dis2 vr2 dis2 pb dis1 pa v dd a cd setp dir hsm reset sgnd ct pgnd mo v cc m a1 v mm1 v mm1 stepper motor m b1 m a2 m b1 rc gnd e 1 c 1 e 2 c 2 njm377 5 nju 7380 12 4 19 3 1 20 22 21 15 2 8 5,6, 17,18 11 14 7 10 9 16 12 2 1 3 4 5 6 7 8 10 12 11 13 14 9 +5v v cc v mm gnd(v cc ) gnd(v mm ) pin number refer to dip package 0.1 f r s 0.47 ? 4700pf 4 10k ? r 1 10k ? r 3 r 2 12k ? mo r s 0.47 ? 10 f + +5v 4.7 f direction step half ? full step reset
NJU7380 - 5 - ? hsm ? half/full step mode switching this signal determines whether the stepping motor turns at half step or full step mode. the built-in phase logic is set to the half step mode when hsm is low level. although hsm can be modified this should be avoided since a misstep of 1 pulse increment may occur if it is set simultaneous with the negative edge. see the timing chart in figure 4. ? reset a two-phase stepping motor repeats the same winding energizing sequence every angle that is a multiple of four of the basic step. the phase logic sequence is repeated every four pulses in the full step mode and every eight pulses in the half step mode. reset forces to initialize the phase logic to sequence start mode. when reset is at l level, the phase logic is initialized and the energizing pattern of phase logic at sequence start is output. at this time, the step input of phase logic will be ignored during the reset is at ! level. por ? power on and reset function the internal power-on and reset circuit, which is connected to vcc, resets the phase logic and turns off phase output when the power is supplied to prevent missteps. each time the power is turned on, the energizing pattern of phase logic at sequence start is output. mo ? origin monitor at sequence start of the phase logic or after por or external reset, an l level output is made to indicate to external devices that the energizing sequence is in initial status. in a system using a stepping motor, the device sensor and the mo and function enable a higher resolution detection of motor origin. fig.4 timing chart hsm,dir step,reset vp ts t p td
NJU7380 - 6 - timing chart fig.5-1 full-step mode,forward 4-step sequence fig.5-2 full-step mode,reverse 4-step sequence fig.5-3 half-step mode,forward 8-step sequence fig.5-4 half-step mode,reverse 8-step sequence dir hsm step pa pb disa disb 1 2 3 4 1 2 3 4 1 l h h off off on on por mo on dir hsm ste pa pb disa disb mo 1 2 3 4 5 6 7 8 1 h l h off off on on on por dir hsm step pa pb disa disb mo 1 2 3 4 5 6 7 8 1 l l h off off on on on por dir hsm step pa pb disa disb 1 2 3 4 1 2 3 4 1 h h h off off on on por mo on
NJU7380 -7- acd ? auto current down function the acd feature monitors step signals and sets the acd pin output to h when the negative edge of a step signal is input. it then sets the acd output to l after a time (t on ) that is fixed by the capacitor that is connected to the ct pin. by combining this pin with the vr pin that determines motor current for the njm3775 motor, it is possible to reduce current when stopping the motor. if the next negative edge of a step is input during the time t on , an internal retrigger will operate, maintaining the acd pin's h output. that is, after the final negative edge of a step is input, acd h output is maintained during the time t on , after which it is set to l. the time t on must be long enough to securely stop the stepping motor. approximately 100ms is usually sufficient for normal applications. the following expression determines the time t on . ? to n [ ms ] =3 10 9 ct [ f ] fig.6 acd operation timing diagram ton=2x10 6 xct ton step pa pb a c d ct normal revolution stat e a cd o p eration stat e ton [caution] the specifications on this databook are only given for information , without any guarantee as regards either mistakes or omissions. the application circuits in this databook are described only to show representative usages of the product and not intended for the guarantee or permission of any right including the industrial rights.
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